1. Field of the Invention
The present invention relates to an electronic device, more particularly to a technology for increasing an operation speed and reducing a circuit area and power consumption in an electronic device for amplifying voltage transition in a signal wire inside and outside of a semiconductor integrated circuit.
2. Description of the Related Art
Along with the miniaturization of the manufacturing process of a semiconductor integrated circuit, a wiring aperture in a chip constituting the semiconductor integrated circuit is increasingly thinner, and a wiring resistance is on the steady increase. In relation to an inter-chip wiring, a board-level chip mounting density has been increasing as the mounting technology advances in recent years, which results in an increase in inter-chip connection wiring resistance.
In order to prevent the reduction of an operation speed in the chip due to the increased wiring resistance, a repeater (relaying buffer) is inserted between interfaces (I/F), in the case of I/F which demands a relatively long wire (>1 mm) such as a signal I/F between functional blocks inside the chip, so as to divide the resistance of the long wire, thereby realizing the speedup of the operation.
However, the insertion of the repeater is only effective in the case of I/F where a signal is transmitted or received in one fixed direction. In the case of I/F for a bidirectional bus (transmission and reception are not limited to one direction), it is necessary to use, not a buffer having a simple structure, but one having a tristate structure, as the repeater, and it thereby becomes necessary to prepare the tristate buffers in all directions which the signal is propagated. Further, it is necessary to provide a control signal wire for controlling the direction in which the signal is propagated, which unfavorably invites an increase in a circuit area and power consumption. This problem was solved by electronic devices called a booster circuit and regenerator circuit, exampled of which are recited in No. H08-186482 of the Japanese Patent Applications Laid-Open (hereinafter, referred to as conventional example 1), and Ankireddy Nalamalpu, et al.: Boosters for Driving Long Onchip Interconnects-Design Issues, Interconnect Synthesis, and Comparison With Repeaters IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEM, VOL. 21, No. 1, JANUARY 2002 (hereinafter, referred to as conventional example 2).
In the respective electronic devices for amplifying voltage transition in a signal wire, which are recited in the conventional examples 1 and 2, a maximum drive unit for amplifying a current with respect to the signal wire comprises serial transistors in two stages. Therefore, the performance of a transistor in each stage is required to be twice as much in order to realize voltage transition time equal to that of the repeater (buffer). Accordingly, a gate width and a gate capacitance of the transistor need to be doubled, which consequently requires electric power twice as much as that of the repeater. In the conventional example 2 (structure comprising a Schmitt trigger circuit) which is structurally fragile with respect to an input noise of the signal wire, it is necessary to additionally provide a voltage retaining circuit (positive-feedback buffer) in the signal wire. However, an area of the voltage retaining circuit itself is increased, and an amplification factor toward a voltage to which a potential of the signal wire transits is reduced.